Using Quantum Gates to design a PID Controller for Nano robots Journal title: International Research Journal of Applied and Basic Sciences Authors: Navid Razmjooy *| Department of Electrical Engineering, University of Tafresh, Tafresh, Iran, Email:... Subject(s): Public Health and Community Medicine
Reversible Multiplier with Peres Gate and Full Adder Journal title: International Journal of Electronics Communication and Computer Technology Authors: Prof. Amol D. Morankar| Dept. of Electronics and Telecommunication Engg. V.N.I.T Nagpur, India, Prof... Subject(s): Computer and Information Science, Engineering
VLSI Design of Low Power Reversible 8-bit Barrel Shifter Journal title: The International Journal of Technological Exploration and Learning Authors: Ch. Srigowri| PG Scholar Department of Electronics and Communication Engineering Kakinada Institute... Subject(s): Engineering, Educational Technology
Protection of “Fault Tolerant Parallel Filters†by Hamming code with Reversible logic Journal title: International Journal of Science Engineering and Advance Technology Authors: Sabbi Suryakala| M.Tech(student), VLSI & Embedded systems, Dept.of Electronics and Communication Eng... Subject(s): Engineering, Medicine, Social Sciences, Pharmacy
Urdhva Tiryagbhyam Sutra Multiplier Based 32-Bit MAC Design Journal title: International Journal of Science Engineering and Advance Technology Authors: Bandaru.Divakar| Student, Aditya College of Engineering, Surampalem A.P. India bdk403@gmail.com, T.S... Subject(s): Engineering, Medicine, Social Sciences, Pharmacy
Design of Multiplier and Divider Using Reversible Logic Gates with Vedic Mathematical Approach Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: G. Radhika, D.R.V.A.Sharath Kumar Subject(s): Engineering, Applied Linguistics
Memory Design Using Logical Gates Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Mandisha Sharma , Mansi Kakkar, Manish Sharma Subject(s): Engineering, Applied Linguistics
Implementation of Optimized 64 Bit MAC using Vedic Multiplier and Reverse Logic Gate Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Savitha S, S. Raja, Amrutha Soroobini S, Anusruthi K, Barani Priya L Subject(s): Engineering, Applied Linguistics
Quantum Realization Full Adder-Subtractor Circuit Design Using Islam gate Journal title: International Journal for Research in Applied Science and Engineering Technology (IJRASET) Authors: Madhumita Mazumder, Indranil Guha Roy Subject(s): Engineering, Applied Linguistics
High Speed Design of an Information Lossless 8 Bit Carry Select Adder using CNT FET Journal title: International Journal of Research in Computer and Communication Technology Authors: S.Manisha Sree Adithtya, S.P.Saraswathi, S.Niranjana Subject(s): Computer and Information Science, Telecommunications
Design of Reversible Mod-16 Synchronous Counter Journal title: International Journal of Research in Computer and Communication Technology Authors: T.V.V.S.S. Varalakshmi, M. Vidya Subject(s): Computer and Information Science, Telecommunications
Performance Analysis Of Vedic Multiplier Using Reversible Logic In Spartan 6 Journal title: International Journal of Research in Computer and Communication Technology Authors: T Nagaveer, M Neelima, VNM Brahmanandam Subject(s): Computer and Information Science, Telecommunications
Design of Reversible Counter Journal title: International Journal of Advanced Computer Science & Applications Authors: Md. Selim Mamun, B. K. Karmaker Subject(s):
Efficient Design Of 4-Bit Binary Adder Using Reversible Logic Gates Journal title: International Journal of Engineering Sciences & Research Technology Authors: Abinash Kumar Pala Subject(s):
Optimized design of BCD adder and Carry skip BCD adder using reversible logic gates Journal title: International Journal on Computer Science and Engineering Authors: H R Bhagyalakshmi , M K Venkatesha Subject(s):
